개요

환경

사진

샘플 코드

from polyphony import testbench, module, is_worker_running
from polyphony.timing import clksleep
from polyphony.io import Port
from polyphony.typing import bit, uint8

@module
class a2z:
    def __init__(self):
        self.send = Port(bit, 'out', init=0)
        self.data = Port(uint8, 'out', init=0)
        self.append_worker(self.worker)
    def _wait(self):
        for i in range(100000):
            pass
    def worker(self):
        i = 97
        while is_worker_running():
            if (i < 122):
                self.data(i)
                self.send(1)
                clksleep(1)
                self.send(0)
                i = i + 1
                self._wait()

m = a2z()

verilog 코드

module test2(input clk, input rst, output tx);
    wire [7:0] data;
    wire send;
    tx2 tx2(.clk(clk), .rst(rst), .start(send), .data(data), .tx(tx), .busy(busy), .get(get));
    a2z_m m(.clk(clk), .rst(rst), .data(data), .send(send));
endmodule