삽입식 학습노트 101-uboot1.1.6 이식(1)

전편 블로그(삽입식 학습노트 100-uboot1.6 초체험)의 마지막 결론에 따라 지금부터 이를 실현한다. a.makefile의 CROSS 수정COMPILE 지정 컴파일러

arm-linux-gcc -v –> gcc version 3.4.5

CROSS_COMPILE =/opt/EmbedSky/crosstools_3.4.5_softfloat/gcc-3.4.5-glibc-2.3.6/arm-linux/bin/arm-linux-

chmod -R 777 u-boot-1.1.6/

b. makefile에 이 설정을 추가합니다.tq2440_config: unconfig @ (MKCONFIG) (@: config=) arm arm920t tq2440 NULL s3c24x0 c. board 디렉토리에 새로 추가된 보드의 이름은 디렉토리입니다.

cd board/

cp -ar smdk2410/tq2440

mv smdk2410.c tq2440.c

Makefile smdk2410.o –> tq2440.o

d. include/configs에 새 보드의 헤더 파일을 추가합니다. 파일 이름은 설정의 첫 번째 인자 이름입니다.

cd include/configs/

cp smdk2410.h tq2440.h

e. make xxx_config 구성 보드

make tq2440_config –> Configuring for tq2440 board…

f. make all 컴파일 구성 정보

make all –> 디렉터리에 bin 등 파일을 생성합니다

시작 프로세스 분석: a. 루트 디렉터리에서lib로 시작하는 라이브러리를 방해하지 않도록 불필요한 파일을 삭제하고libarm lib_generic 삭제board 아래 smdk2410과 tq2440을 제외한 모든 파일 삭제include 아래 asm-arm 이외의 asm-xx 디렉터리include 아래 configs 아래 smdk2410.h와 tq2440.h를 제외한 모든 헤더 파일은 cpu에서arm920t를 제외한 모든 cpu를 삭제하고 새로운 프로젝트를 다시 만들거나 기존 프로젝트 syncb. 1단계 코드 분석

/* * armboot - Startup Code for ARM920 CPU-core * * Copyright (c) 2001 Marius Gr er <[email protected]> * Copyright (c) 2002 Alex Z ke <[email protected]> * Copyright (c) 2002 Gary Jennejohn <[email protected]> * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */


#include <config.h>
#include <version.h>
/*============ ===     ====================== * *   P28 config.h     ，        *mkconfig   include   config.h，       *#include <configs/tq2440.h>，              * include/configs/tq2440.h     * *=================================================*/


/* ************************************************************************* * * Jump vector table as in table 3.1 in [1] * ************************************************************************* */


.globl _start
_start: b       reset
    ldr pc, _undefined_instruction
    ldr pc, _software_interrupt
    ldr pc, _prefetch_abort
    ldr pc, _data_abort
    ldr pc, _not_used
    ldr pc, _irq
    ldr pc, _fiq

_undefined_instruction: .word undefined_instruction
_software_interrupt:    .word software_interrupt
_prefetch_abort:    .word prefetch_abort
_data_abort:        .word data_abort
_not_used:      .word not_used
_irq:           .word irq
_fiq:           .word fiq

    .balignl 16,0xdeadbeef

/*============ ===     ====================== * *P41-P57               *           IRQ,FIQ        * *=================================================*/
/* ************************************************************************* * * Startup Code (reset vector) * * do important init only if we don't start from memory! * relocate armboot to ram * setup stack * jump to second stage * ************************************************************************* */

_TEXT_BASE:
    .word   TEXT_BASE

.globl _armboot_start
_armboot_start:
    .word _start

/* * These are defined in the board-specific linker script. */
.globl _bss_start
_bss_start:
    .word __bss_start

.globl _bss_end
_bss_end:
    .word _end

#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
.globl IRQ_STACK_START
IRQ_STACK_START:
    .word   0x0badc0de

/* IRQ stack memory (calculated at run-time) */
.globl FIQ_STACK_START
FIQ_STACK_START:
    .word 0x0badc0de
#endif

/*============ ===     ====================== * *       IRQ/FIQ    tq2440.h  *    CONFIG_USE_IRQ，  stack      *  0x0badc0de，        * *=================================================*/


/* * the actual reset code */

reset:
    /* * set the cpu to SVC32 mode */
    mrs r0,cpsr
    bic r0,r0,#0x1f
    orr r0,r0,#0xd3
    msr cpsr,r0

/* turn off the watchdog */
#if defined(CONFIG_S3C2400)
# define pWTCON 0x15300000
# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
# define CLKDIVN 0x14800014 /* clock divisor register */
#elif defined(CONFIG_S3C2410)
# define pWTCON 0x53000000
# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
# define INTSUBMSK 0x4A00001C
# define CLKDIVN 0x4C000014 /* clock divisor register */
#endif

#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
    ldr     r0, =pWTCON
    mov     r1, #0x0
    str     r1, [r0]

    /* * mask all IRQs by setting all bits in the INTMR - default */
    mov r1, #0xffffffff
    ldr r0, =INTMSK
    str r1, [r0]
# if defined(CONFIG_S3C2410)
    ldr r1, =0x3ff
    ldr r0, =INTSUBMSK
    str r1, [r0]
# endif

    /* FCLK:HCLK:PCLK = 1:2:4 */
    /* default FCLK is 120 MHz ! */
    ldr r0, =CLKDIVN
    mov r1, #3
    str r1, [r0]
#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 */

/*============ ===     ====================== * *P131-P174              *     ，        * *=================================================*/


    /* * we do sys-critical inits only at reboot, * not when booting from ram! */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
    bl  cpu_init_crit
#endif

/*============ ===     ====================== * *P188-P190              *               RAM *        cpu_init_crit      RAM  *     ，code download RAM        *    ，      cpu_init_crit    * *=================================================*/

#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate:               /* relocate U-Boot to RAM */
    adr r0, _start      /* r0 <- current position of code */
    ldr r1, _TEXT_BASE      /* test if we run from flash or RAM */
    cmp     r0, r1                  /* don't reloc during debug */
    beq     stack_setup

    ldr r2, _armboot_start
    ldr r3, _bss_start
    sub r2, r3, r2      /* r2 <- size of armboot */
    add r2, r0, r2      /* r2 <- source end address */

copy_loop:
    ldmia   r0!, {r3-r10}       /* copy from source address [r0] */
    stmia   r1!, {r3-r10}       /* copy to target address [r1] */
    cmp r0, r2          /* until source end addreee [r2] */
    ble copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */

/*============ ===     ====================== * *P202-P219         code          *  adr r0, _start               *  _start   board/tq2440/config.mk * TEXT_BASE = 0x33F80000 *              PC  0  +4 ，   *     PC  _start    _start=0,  *_TEXT_BASE = 0x33F80000，        copy  ， *       code download RAM 0x33F80000 ，     *code       * *=================================================*/



    /* Set up the stack */
stack_setup:
    ldr r0, _TEXT_BASE      /* upper 128 KiB: relocated uboot */
    sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
    sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
    sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
    sub sp, r0, #12 /* leave 3 words for abort-stack */

/*============ ===     ====================== * *P237-P245            ，      C   *        ，     _TEXT_BASE     ，   *  _TEXT_BASE   RAM   ，   _TEXT_BASE    *0x30000000，       RAM !       ，  _TEXT_BASE *    CFG_MALLOC_LEN buffer，CFG_GBL_DATA_SIZE    *  linux    * *=================================================*/


clear_bss:
    ldr r0, _bss_start      /* find start of bss segment */
    ldr r1, _bss_end        /* stop here */
    mov     r2, #0x00000000 /* clear */

clbss_l:str r2, [r0]        /* clear loop... */
    add r0, r0, #4
    cmp r0, r1
    ble clbss_l

#if 0
    /* try doing this stuff after the relocation */
    ldr     r0, =pWTCON
    mov     r1, #0x0
    str     r1, [r0]

    /* * mask all IRQs by setting all bits in the INTMR - default */
    mov r1, #0xffffffff
    ldr r0, =INTMR
    str r1, [r0]

    /* FCLK:HCLK:PCLK = 1:2:4 */
    /* default FCLK is 120 MHz ! */
    ldr r0, =CLKDIVN
    mov r1, #3
    str r1, [r0]
    /* END stuff after relocation */
#endif

    ldr pc, _start_armboot

_start_armboot: .word start_armboot

/*============ ===     ====================== * *         _start_armboot，       *ldr pc, _start_armboot ldr       ，     *        * *=================================================*/


/* ************************************************************************* * * CPU_init_critical registers * * setup important registers * setup memory timing * ************************************************************************* */


#ifndef CONFIG_SKIP_LOWLEVEL_INIT
cpu_init_crit:
    /* * flush v4 I/D caches */
    mov r0, #0
    mcr p15, 0, r0, c7, c7, 0   /* flush v3/v4 cache */
    mcr p15, 0, r0, c8, c7, 0   /* flush v4 TLB */

    /* * disable MMU stuff and caches */
    mrc p15, 0, r0, c1, c0, 0
    bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
    bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
    orr r0, r0, #0x00000002 @ set bit 2 (A) Align
    orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
    mcr p15, 0, r0, c1, c0, 0

    /* * before relocating, we have to setup RAM timing * because memory timing is board-dependend, you will * find a lowlevel_init.S in your board directory. */
    mov ip, lr
    bl  lowlevel_init
    mov lr, ip
    mov pc, lr
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */

/* ************************************************************************* * * Interrupt handling * ************************************************************************* */

@
@ IRQ stack frame.
@
#define S_FRAME_SIZE 72

#define S_OLD_R0 68
#define S_PSR 64
#define S_PC 60
#define S_LR 56
#define S_SP 52

#define S_IP 48
#define S_FP 44
#define S_R10 40
#define S_R9 36
#define S_R8 32
#define S_R7 28
#define S_R6 24
#define S_R5 20
#define S_R4 16
#define S_R3 12
#define S_R2 8
#define S_R1 4
#define S_R0 0

#define MODE_SVC 0x13
#define I_BIT 0x80

/* * use bad_save_user_regs for abort/prefetch/undef/swi ... * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling */

    .macro  bad_save_user_regs
    sub sp, sp, #S_FRAME_SIZE
    stmia   sp, {r0 - r12}          @ Calling r0-r12
    ldr r2, _armboot_start
    sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
    sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
    ldmia   r2, {r2 - r3}           @ get pc, cpsr
    add r0, sp, #S_FRAME_SIZE @ restore sp_SVC

    add r5, sp, #S_SP
    mov r1, lr
    stmia   r5, {r0 - r3}           @ save sp_SVC, lr_SVC, pc, cpsr
    mov r0, sp
    .endm

    .macro  irq_save_user_regs
    sub sp, sp, #S_FRAME_SIZE
    stmia   sp, {r0 - r12}          @ Calling r0-r12
    add     r8, sp, #S_PC
    stmdb   r8, {sp, lr}^                   @ Calling SP, LR
    str     lr, [r8, #0] @ Save calling PC
    mrs     r6, spsr
    str     r6, [r8, #4] @ Save CPSR
    str     r0, [r8, #8] @ Save OLD_R0
    mov r0, sp
    .endm

    .macro  irq_restore_user_regs
    ldmia   sp, {r0 - lr}^          @ Calling r0 - lr
    mov r0, r0
    ldr lr, [sp, #S_PC] @ Get PC
    add sp, sp, #S_FRAME_SIZE
    subs    pc, lr, #4 @ return & move spsr_svc into cpsr
    .endm

    .macro get_bad_stack
    ldr r13, _armboot_start     @ setup our mode stack
    sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
    sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack

    str lr, [r13]           @ save caller lr / spsr
    mrs lr, spsr
    str     lr, [r13, #4]

    mov r13, #MODE_SVC @ prepare SVC-Mode
    @ msr   spsr_c, r13
    msr spsr, r13
    mov lr, pc
    movs    pc, lr
    .endm

    .macro get_irq_stack            @ setup IRQ stack
    ldr sp, IRQ_STACK_START
    .endm

    .macro get_fiq_stack            @ setup FIQ stack
    ldr sp, FIQ_STACK_START
    .endm

/* * exception handlers */
    .align  5
undefined_instruction:
    get_bad_stack
    bad_save_user_regs
    bl  do_undefined_instruction

    .align  5
software_interrupt:
    get_bad_stack
    bad_save_user_regs
    bl  do_software_interrupt

    .align  5
prefetch_abort:
    get_bad_stack
    bad_save_user_regs
    bl  do_prefetch_abort

    .align  5
data_abort:
    get_bad_stack
    bad_save_user_regs
    bl  do_data_abort

    .align  5
not_used:
    get_bad_stack
    bad_save_user_regs
    bl  do_not_used

#ifdef CONFIG_USE_IRQ

    .align  5
irq:
    get_irq_stack
    irq_save_user_regs
    bl  do_irq
    irq_restore_user_regs

    .align  5
fiq:
    get_fiq_stack
    /* someone ought to write a more effiction fiq_save_user_regs */
    irq_save_user_regs
    bl  do_fiq
    irq_restore_user_regs

#else

    .align  5
irq:
    get_bad_stack
    bad_save_user_regs
    bl  do_irq

    .align  5
fiq:
    get_bad_stack
    bad_save_user_regs
    bl  do_fiq

#endif